Matrix-orbital LCD2041 Legacy Manuale Utente Pagina 11

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LCD2041 rev 2
11
The module is supplied with jumpers J1 and J2 installed, which gives an RS-232 baud rate of 19200 and an
I
2
C address of 0x5C.
RS-232 port: J0, J1, J2 - control baud rate. RS-232 format is 8N1 (8 bits, no parity, one stop bit)
I²C port: J0, J1, J2, J3 - sets slave peripheral address
Baud Rate Slave Address J3 J2 J1 J0
50H out out out out
1200
52H out out out in
54H out out in out
2400
56H out out in in
58H out in out out
9600
5AH out in out in
5CH out in in out
19200
5EH out in in in
60H in out out out
1200
62H in out out in
64H in out in out
2400
66H in out in in
68H in in out out
9600
6AH in in out in
6CH in in in out
19200
6EH in in in in
2.3 I
2
C Communications
I²C communications runs at 100 kBps and supports up to 16 units on a single communications line. The
I2C data line operates on 5 volt CMOS levels.
The idea of ACK is to indicate when the data has been received correctly. ACK does not indicate data
incorrectly received. ACK simply fails to indicate when data is correctly received. Clearly, this is of limited
usefulness and even less so with Matrix Orbital modules. Matrix orbital modules are not capable of failing
to acknowledge an incorrectly received byte in response to that bytes transition. They are only capable of
failing to acknowledge the bytes following the byte, which was not received. To fully understand the
reasons for this one needs to understand something about how a Matrix Orbital module processes data.
Basically the reason why a Matrix Orbital module might fail to receive a byte correctly is that it was unable
to process the byte previous before the failed byte was transmitted. Because the module cannot possibly
know that it would be unable to store the byte before the next byte was received it cannot know to not ACK.
The reason for this situation in deference to situations you might be familiar with (i.e. memory chips, etc…)
is that the Matrix Orbital module employs a microprocessor to perform these data storage functions. A
memory chip takes care of these things entirely with in hardware subsystems that operate at the same speed
as the transmission themselves.
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